1. Field of the Invention
The present invention relates generally to a step cut type insulated gate SIT (static induction transistor) applicable to a high-frequency amplifier or an integrated circuit, and more particularly to a structure and manufacturing method of a step cut type insulated gate SIT, wherein a conductive layer formed of either a refractory metal or a refractory metal silicide is formed on part of the side surface of a gate electrode manner, thereby reducing the resistance of the gate electrode and enabling a high-speed operation and low power dissipation. The present invention relates also to a structure and a manufacturing method of a step cut type insulated gate SIT, wherein a conductive layer formed of either a refractory metal or a refractory metal silicide is formed not only on the surface of a gate electrode but also on the surface of a source/drain region manner, thereby reducing the resistance of the source/drain region as well and enabling a higher-speed operation and lower power dissipation.
2. Description of the Related Art
An insulated gate FET is generally employed in a high-frequency amplifier or an integrated circuit. This insulated gate FET has the following defects. First, a transconductance is small because a current path is limited to a thin region near an interface between a semiconductor and an insulating film. Second, a gate input capacitance is large. Thus, a switching speed cannot be increased due to the- time constant defined by these two.
As a general means for solving these defects, a channel of the insulated gate SIT is shortened. However, this countermeasure is not sufficient, and various transistors having other structures have been proposed. These proposals include, for example, an "insulated gate static induction transistor" and a "step cut type insulated gate SIT" described in Published Unexamined Japanese Patent Applications Nos. 52-1756 (U.S. Pat. No. 4,814,839) and 52-13707, respectively.
Features of these transistors provide excellent performance of a high-speed switching device or an device for a high-speed and low-power dissipation IC.
The insulated gate SIT designed so that a drain electric field reaches a source has an non-saturating current-voltage characteristics and a large transconductance, since a current flows not only near an interface between a semiconductor substrate and an insulating film, but also through the substrate. The step cut type insulated gate SIT has good controllability for a channel length or a gate length and is suitable for a short channel, since a channel is formed in a direction of depth of the semiconductor substrate.
In the step cut type insulated gate SIT, however, a gate electrode is formed on the side wall of a U-shaped groove by polysilicon. Therefore, since the gate series resistance of this transistor is large, a switching speed is limited by the time constant defined by the gate series resistance and the input capacitance.
Moreover, as the thickness of the drain and source regions must be thin, the resistance is not sufficiently small. Since wiring layers consisting of Al or an Al-Si alloy directly contact these regions, a contact resistance is not sufficiently small, too. This is a reason for increasing power dissipation.